LFP memory effects thread

[nebster]

Originally Posted by john61ct

Yes excellent graph that, thanks for posting it!

What was the charge C-rate there?

And by what measure is SoC on the right side being determined?

You're most welcome.

The rate is about 0.2C. It starts out around 0.25C and droops down slowly over the course of three hours.

The SOC on the right is coming from a BMV-702. It's a very rough approximation in this case, because we can't see when it last synced and because I have it configured to attempt model the SOC of a smaller battery -- in effect, one that only has about 90% of the true capacity of my pack.

For that matter, the exact voltage values on the graph are also an approximation. I am limited in the accuracy of my Victron equipment (which I cannot calibrate) and the limitations of where the sense pair can be placed (because my pack is comprised of many strings, each with interconnect, fusing, and contactors in circuit).

Take the curve, for purposes of this discussion, as suggestive of the behavior but not perhaps not suitable for direct comparison to other systems.

[CatNewBee]

It looks to me like the controller switches from bulk to float at the bump..

[nebster]

Originally Posted by CatNewBee

It looks to me like the controller switches from bulk to float at the bump..

I probably should've drawn some stuff on the picture to make it better.

The "bump" I thought was interesting starts about one third of the way across the graph going from left to right. Around that bump the charger is still in CC and running at its maximum rate (and the yellow SOC curve stays perfectly linear).

The bump over towards the right is the start of the knee, and the charger switches to CV right away there.

The charger switches to float shortly after this graph, so it's not shown there. I float pretty low, roughly 3.31Vpc.

[AGM]

Originally Posted by nebster

Perhaps interestingly, my pack (now ~200 cycles) also has a "gentle bump" around the midpoint of its SOC. Here is a charge from a few days ago:

Hi,
53.5V/16 = 3.34Vpc, smack in the middle between the two main peaks of this chemistry's IC curve. Nothing new there.
Re top memory release, I've had good results charging to 3.75Vpc.

[john61ct]

Hey AGM, you were around when Terry documented his memory effect tests, right? Was that on Caravaners? I couldn't find any links in my notes. . .

[tanglewood]

Originally Posted by Delfin

That is really interesting. Do you have any theory on what may be happening mechanically/chemically to explain this? Is what we are discussing here a steepening of that "bump" due to chronic undercharging?

There is research that demonstrates the behavior, and explains exactly what's happening. If you look back through this thread (sorry, I don't have the link handy), there are links to the research.


The operative questions are, I think;


1) What does it take to clear the memory bump, or at least to charge past it. So far it seems this is easy to do using an intentional full charge, attentive to the full charge voltage and acceptance current points.


2) To what extend do these memory "bumps" accumulate, and do they become progressively difficult to clear or charge past.


One person, and perhaps another, believe they have what seems to be permanent loss of capacity due to #2 above. But that appears to be theory, and not anything demonstrated in any conclusive way. Other than the batteries having been run at a consistent PSOC, there doesn't seem to be anything that attributes the loss of capacity to a cumulative memory effect. And of course there are countless other possible causes of capacity loss that would have to be eliminated in conjunction with attributing the loss to cumulative memory effect.

[AGM]

Originally Posted by john61ct

Hey AGM, you were around when Terry documented his memory effect tests, right? Was that on Caravaners? I couldn't find any links in my notes. . .

Sorry I'm not aware of any such tests.
Given the amount of research papers and reports, this is now a mature chemistry and there's answers to be found in there for all sorts of behaviour including non permanent and permanent capacity fade.
With non permanent attributed to memory, there's a simple way to get rid of it.
For instance, see page 10 for a brief mention of it:
https://www.mdpi.com/1996-1073/10/1/110/pdf

[Cpt Pat]

Originally Posted by CatNewBee

Coulomb counting is not a reliable indicator for charging, because you never know how much energy is converted in heat during the process. There is no 100 per cent charge efficiency even with LFP. Voltage is quite good at the shoulders, but still depends on cell temperature and current.

When charging, you have to make sure every cell has the same voltage and temperature to ensure a balanced pack and can rely on termination charge voltage for the pack as provided by the charge controllers, otherwise you may notoriously overcharge and damage one of the cells.

Coulomb counting is the only charging method I have seen recommended in studies (posted in this thread) for preventing progressively worsening memory effect.

Provided you stay off "the shoulders" (staying between 20 and 80% SOC) with fractional charging currents during cyclic charging, very little energy is lost to heat dissipation. My measurements show 1% lost to heat at ambient temperatures of 15 to 30 degrees C.

[john61ct]

Originally Posted by Cpt Pat

Provided you stay off "the shoulders" (staying between 20 and 80% SOC) with fractional charging currents during cyclic charging, very little energy is lost to heat dissipation. My measurements show 1% lost to heat at ambient temperatures of 15 to 30 degrees C.

Major paradigm disconnect here.

Most players here these days (and certainly those involved in this thread) believe the "avoid the shoulders" approach is inherently unhealthy and in fact the cause of this "memory effect" phenomenon.

They advocate following the mfg specs for absolute maximum ratings as if they were recommendations for normal cycling operations.

Now I will concede, **if** a memory effect is detected, then any lost capacity should be recovered within a short time, certainly weeks or a month.

But avoiding the shoulders does not require sacrificing **anywhere near** that 40% of usable capacity, if you measure SoC accurately using CC load tests as opposed to relying on coulomb counting.

But all this really should be discussed outside of this thread.

Maybe continue here http://www.cruisersforum.com/forums/...-211772-6.html

?

[AGM]

Originally Posted by john61ct

Major paradigm disconnect here.

Most players here these days (and certainly those involved in this thread) believe the "avoid the shoulders" approach is inherently unhealthy and in fact the cause of this "memory effect" phenomenon.

They advocate following the mfg specs for absolute maximum ratings as if they were recommendations for normal cycling operations.

Max charging voltage as specified by Winston for instance is 4.00Vpc @ 25degC or 3.8Vpc if higher temps are anticipated.
I doubt anyone advocates following these recommendations for routine charging purposes.
Top memory has been shown to be erasable by charging to an elevated level up to 3.75Vpc on reasonably fresh cells.
What we don't seem to know though, is how the efficacy of this 'treatment' is affected by the accumulated number of PSOC cycles, and/or by their calendar age.
I'm looking forward to see reports in this regards, from seasoned users like OceanSeaSpray and evm1024 or anyone else who's noticed capacity fade in conjunction with incomplete charging cycles.

[CatNewBee]

Actually, Winston recommends initializing the cells before use to 4.0V to make them equal before first use.

The voltage set points are 3.65V for stop charge and 2.8V if I recall correctly for stop discharge.

[AGM]

Originally Posted by CatNewBee

Actually, Winston recommends initializing the cells before use to 4.0V to make them equal before first use.

The voltage set points are 3.65V for stop charge and 2.8V if I recall correctly for stop discharge.

Straight from their manual, p.20:
"the LYP battery working voltage is 2.7~4V"

But you're not wrong, most cells come with a lower specced upper working voltage limit.
Anyway, memory can be erased at 3.75Vpc @ C/3 termination. To me that makes sense because it's slightly above the usual working range limit of 3.60V~3.65V. This should push any existing voltage bumps out, into a region where they get consumed by charging reactions like phase transitions or whatever.
Charging rate may play a role too if you picture the ionic flow picking up speed and inertia required for more complete intercalation.
Apologies if that's a bit too much speculation on my part.

[Delfin]

When new two years ago, if a charge source was set for "bulk" at 3.55 vpc, my bank would reach that pack voltage without issue and I would terminate charging when the acceptance rate was <5% or so. Now, and after around 100 cycles, the pack resists breaking through that 3.55 vpc unless I set the charge source much higher. Then it cruises through 3.55, but still settles with acceptance rate near zero at around .05 vpc below the charge source voltage setting. Since this behavior happens with any of three separate dino charge sources, I don't think it has anything to do with the source, but something has changed in the pack.

I have no clue what this means but I see no decrease in total capacity or behavior of the pack under load. Instead of early termination of charging at around 3.55 vpc without absorption, I'm going to charge to 3.65 vpc with 30 minute absorption by setting the charge source at 3.75 vpc, which the pack will never reach since the shunts kick in at 3.65. I'd like to see if after a week or so of this routine the pack will reach the bulk voltage setting of the charge source rather than settling under it by .05 vpc.

Still learning....

[john61ct]

Originally Posted by Delfin

setting the charge source at 3.75 vpc, which the pack will never reach since the shunts kick in at 3.65

What do you mean by "the shunts kicking in" there?

And are you saying your CC load tests confirm that your bank is still delivering the same capacity now as when new?

[Cpt Pat]

Originally Posted by john61ct

Major paradigm disconnect here.

Most players here these days (and certainly those involved in this thread) believe the "avoid the shoulders" approach is inherently unhealthy and in fact the cause of this "memory effect" phenomenon.

They advocate following the mfg specs for absolute maximum ratings as if they were recommendations for normal cycling operations.

Now I will concede, **if** a memory effect is detected, then any lost capacity should be recovered within a short time, certainly weeks or a month.

But avoiding the shoulders does not require sacrificing **anywhere near** that 40% of usable capacity, if you measure SoC accurately using CC load tests as opposed to relying on coulomb counting.

But all this really should be discussed outside of this thread.

Maybe continue here http://www.cruisersforum.com/forums/...-211772-6.html

?

It seems a point is being lost here: The manufacturer's cell voltage specs are based on a charge current that is also specified. Change the charge current, and the voltage spec no longer applies. If the charge current is "tuned" to the cell capacity, a termination voltage to reach a given SOC can be specified, but only for that charge current value. Here is a theoretical example to illustrate:

First, factory specs...

Charge current: 0.5C
Termination voltage: 3.65 volts
SOC at termination: 100%

Now change the charge current...

Charge current: 0.2C
Termination voltage: 3.65 volts
SOC at termination: very much more than 100% (100% SOC was now reached at a cell voltage of 3.50 volts). Result: severe overcharging. A worst case would be charging at very low current, where 100% SOC would be reached at 3.40 volts.

How do you prevent over or under charging with variable charge currents? Count amp-hours.

Now imagine my challenge: I'm not charging in a laboratory! I have only variable current sources when underway: photovoltaics. Try as I may, the sun doesn't obey my commands to generate a constant output. Life is a little easier for those of you with wind-assisted motor boats who can burn hydrocarbons to spin an alternator. That alternator can produce something closer to a definable current output.

I compensate for the partial SOC (20%-80%) operational parameters by periodically performing a manually-monitored charge to 100% SOC under controlled conditions off shorepower (closer to lab conditions).

By the way, I do capacity testing by discharging to a 1.2 ohm 200 watt resistor. It's a nearly constant current load.

So far as off-topic posting in this thread, as I understand it, only two contributors here are dealing with a recovery from memory effect. One of whom I believe has "thrown in the towel." The rest of us have posted "off topic." Most of the rest of us have been productively discussing the causes and avoidance of memory effect.

Pot: this is kettle. You're black.